Raymond Preble

Welcome to Raymond Preble's Engineering Portfolio

RIT — B.S. Electrical Engineering, May 2030 Available — Summer 2027 co-op Rochester, NY
Portrait of Raymond Preble

About me

I am a second-year electrical engineering student at RIT and a researcher at the university’s NanoPower Research Laboratory. In the summer of 2026, I took over the lab’s external radiative efficiency (ERE) measurement bench, which had not yet been brought into working condition. I rebuilt the system from the ground up, including its optics, calibration and correction factors, instrument control, and measurement procedure.

Outside of research, I worked as a technical intern for the Pittsford Central School District, where I imaged and configured computers and assisted with deployments across Windows and Apple environments. I currently work as an audio/video technician at Christ Episcopal Church, where I manage sound and livestreaming.

Together, these experiences have shaped my approach to technical work: hands-on, detail-oriented, and focused on making complex systems operate reliably.


Selected work

The rebuilt external radiative efficiency bench on the optical table

External radiative efficiency bench

Summer 2026 – present

When light shines on a solar cell, it creates mobile electrons and holes that eventually recombine; the fraction of those recombination events that produces light escaping the device is called external radiative efficiency (ERE). I rebuilt and calibrated the measurement system, corrected a severe emission-filter leak that had caused the bench to record mostly scattered pump light instead of the device’s emission, and developed the software needed to operate it reliably. The rebuilt system now measures relative ERE, and its results agree with an independent electrical prediction to within approximately 3%, demonstrating that the bench is producing physically consistent measurements rather than merely outputting numbers.

532 nm DPSS · SR830 lock-in · MC1000A chopper · lock-in detection · Python

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ModelSim simulation waveform from the bit-serial adder–subtractor verification run

Bit-serial adder–subtractor

Fall 2025

For a Digital Systems I class assignment, I designed a five-bit adder/subtractor that processes one bit per clock cycle, using one full adder instead of five at the cost of taking five clock cycles. The architecture was specified by the assignment, but I designed the state encoding. I Gray-coded the controller so that only one flip-flop changes on each clock edge, avoiding a class of race conditions.

Quartus Prime · ModelSim · schematic capture · Moore FSM

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Spectrogram of a generated DTMF digit sequence, two bright bands per digit

DTMF tone generator

Spring 2026

For a CMPR 271 assignment, I wrote a C program that generates the tones used by a telephone keypad and saves them as a WAV file. Each key is represented by two sine waves, which I generated and summed sample by sample without using an audio library. I handled the amplitude scaling myself, setting each tone to 16382 so that when two tones peak together, they stay just below the WAV file's maximum value instead of clipping. It's the project here that comes closest to the audio work I want to do more of.

C · digital synthesis · RIFF/WAVE · 16-bit PCM · 44.1 kHz

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